1. Field of the Invention
The present invention relates to a CFL (compact fluorescent lamp) ballast with a passive valley fill configuration, and more particularly to such a ballast with an arrangement for limiting crest factor.
2. Related Art
A known CFL ballast circuit is based on a resonant topology driven by a MOSFET half bridge. The CFL ballast circuit may be controlled by the IR2520 Ballast Control IC from International Rectifier Corp., which is described in the above-mentioned Ser. No. 10/664,676 and provides lamp preheat, lamp ignition, running mode and fault protection (lamp fault, open filaments, failure to strike, deactivated lamp and low AC line). Of course, other ballast and control circuits are known as well and the present invention is not limited to the specific examples herein.
In some applications it is desirable to have a regulated and boosted DC bus voltage and a high power factor, but conventional solutions such as an additional inductor, IC or FET can be expensive. For example, in a low-cost CFL below about 25 W, PFC is not often used because of cost, but this causes very high THD, and cannot prevent light output from varying with the AC line voltage.
To achieve a high power factor, a passive valley fill configuration has been used in the input stage. A diode and a resistor have been added to the standard passive valley fill configuration to reduce THD. However, the lamp current intrinsically has a high crest factor in a passive valley fill configuration because of the bus voltage shape. The crest factor is very high because the bus voltage changes between two different values, very different from each other: about VACpk and ½ VACpk. The current at the minimum bus voltage will be more than double the current at the maximum bus voltage and the intrinsic crest factor will be higher than 2. This condition exists in the case of constant frequency. Using a resistor to limit the harmonics increases the crest factor even further, because the minimum bus voltage decreases.
FIG. 1 shows (A) the bus voltage shape, (B) the lamp current shape, and (C) the lamp voltage shape in a circuit with passive valley fill configuration using a 1K resistor to reduce the harmonics.